Day 19 Phasors: Passive RL Circuit

The objective of this lab was to focus on the steady-state response of electrical circuits to sinusoidal inputs. In this system, the input and output signals have the same frequency, but the two signals have different amplitudes and phase angles (which will be shown later). Below is our pre-lab of initial calculations of our gain for the circuit's output across the inductor.

Below is the circuit construction. We have a 1uH inductor in series with a 1.5 ohm resistor.

Below is a captured image of our RL circuit steady-state response. Steady state occurs when a sinusoidal wave is passed through the circuit, otherwise known as Vss or Iss. Below we see, as expected, that the output voltage of the Inductor leads our output voltage of the resistor by a phase shift Φ. As stated in the pre-lab, the output and input signals have the same input frequency, but varying amplitudes and phase shifts.