Day 16 Series RLC Circuit Step Response

The objective of this lab is to emphasize modeling and testing of a series RLC second order circuit.
This lab was more challenging than pervious labs because it is our introduction into second-order circuits.
Instead of solving a natural response, homogenous second-order differential equation, we have to account for the forced response of our source Vin.
The general equation for the step response of a second-order differential equation is below:

Depending on the values of our circuit components, we will have one of the following general solutions: over damped (a > w), critically damped (a = w), or underdamped ( a < w).

Below are our pre-lab calculations for the underdamped step response. 

For extra practice the natural response values are calculated below, and verify that we have two imaginary roots, confirming that it is an underdamped circuit.

Construction of our series RLC Circuit is below:

As usual, we will measure the voltage across the 0.47 uF capacitor using our oscilloscope from the Analog Discovery.

Here we observe the expected plot of an underdamped circuit. We see a dampening of the signal occurring as the observable sinusoidal Vout dampens until it settles back around the input voltage of 2V.

After extracting the Data measured by Channel C1, I found that Vmax of the output voltage measured at

Vmax = 4.136594903 V

The overshoot of the Vout occurs at the highest peak of the signal, Vmax. Overshoot for this circuit was roughly 2.1V.

Part II of this lab was a design problem: to redesign the circuit without changing the natural frequency or the gain. In order to do this we can follow the calculations below.

Today's lab was much more challenging than labs in the past. It was unfamiliar territory for those who haven't had plenty of experience with second-order circuits or differential equations. Overall, the behavior of an underdamped circuit was able to be observed.